The lower the application criticality and the bigger the project impact, the more leeway you can give if there are legitimate project-killing limitations. It's safe to say that the project is impactful because it adds an important sovereign capability, and low criticality because it won't be used for safety and it's not already slated for use in a flagship mission as a mission-killing component.
The only assumption you have to make is why VHDL would be bad. Could be a technical limitation that would be prohibitively expensive to fix. Could be that this group is coming from a non-space background in Verilog and switching to VHDL would be too long and expensive. Or maybe it's a long-term strategic decision to advance the use of Verilog in space because the ESA feels like VHDL will become a liability in the future.
The lower the application criticality and the bigger the project impact, the more leeway you can give if there are legitimate project-killing limitations. It's safe to say that the project is impactful because it adds an important sovereign capability, and low criticality because it won't be used for safety and it's not already slated for use in a flagship mission as a mission-killing component.
The only assumption you have to make is why VHDL would be bad. Could be a technical limitation that would be prohibitively expensive to fix. Could be that this group is coming from a non-space background in Verilog and switching to VHDL would be too long and expensive. Or maybe it's a long-term strategic decision to advance the use of Verilog in space because the ESA feels like VHDL will become a liability in the future.