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That’s an implementation detail — an optimization on Intel’s side of things. It’s the same effect either way, and I can’t just ask Intel to customize their processors for me.

AWS operates at a large enough scale that they do exactly that, and AWS already purchases directly from Intel, both of which are my main points. Baybal2 doesn’t seem to be aware of either of these facts based on their comment.



Well, the thing is, it doesn't seem to be really customer specific feature.

An option to fuse an individual performance profile, or few more ME features doesn't amount to be something really custom.


It's real custom silicon on the masks; it's not a binning thing. What I've mainly heard of is custom system integration glue for their boards.


Even if that it is, it must be something really small. It's hard to believe for me that they will put even a square millimetre of effectively dead silicon onto xeon for <10% of their sales.


You're basically admitting that you don't know much about these parts of the datacenter industry, but you keep posting comments authoritatively like you do.

Why can't you just ask questions instead of misleading people?


I'm just curious so ask you a question, what's the special feature on Intel processor for AWS? I had imagined something like special turbo-boost parameter to avoid performance hit.


I'm not sure how authoritative other commenter are, but I would be very surprised that Intel was going so far to accommodate them beyond fusing perf profile/ME feature/or some small IP block.

With my knowledge of their sales tactic, I would imagine Intel could've simply said "You are free to buy AMD," with full knowledge that just few years ago their clients had no other option than coming back to them eventually.


Why? Particularly when the practicalities of layout, particularly around the uncore area, mean there's some free space anyway. Also, a square millimeter is around 30-40 million transistors on TSMC 7nm (about Pentium III level gate count), which is almost certainly way more than any of these features would need by orders of magnitude.


Most of the silicon on a chip is turned off at any given time. That dead silicon doesn't hurt as much as you think.


Here's an example of the kinds of speedups you can get from something really small: 3% fleet-wide (estimated) speedup from 0.006% marginal silicon area.

https://www.samxi.org/papers/kanev_asplos2017.pdf




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